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ltc6246/ltc6247/ltc6248 1 624678fb for more information www.linear.com/ltc6246 typical application description 180mhz, 1ma power efficient rail-to-rail i/o op amps the lt c ? 6246/ltc6247 / ltc6248 are single / dual / quad low power , high speed unity gain stable rail-to-rail input / output operational amplifiers . on only 1 ma of supply current they feature an impressive 180 mhz gain-bandwidth product , 90v/ s slew rate and a low 4.2nv/ hz of input-referred noise. the combination of high bandwidth , high slew rate , low power consumption and low broadband noise makes these amplifiers unique among rail-to-rail input / output op amps with similar supply currents . they are ideal for lower supply voltage high speed signal conditioning systems. the ltc6246 family maintains high efficiency performance from supply voltage levels of 2.5 v to 5.25 v and is fully specified at supplies of 2.7v and 5.0v. for applications that require power-down , the ltc6246 and the ltc6247 in ms 10 offer a shutdown pin which disables the amplifier and reduces current consumption to 42a. the ltc6246 family can be used as a plug-in replacement for many commercially available op amps to reduce power or to improve input/output range and performance. l , lt , lt c , lt m , linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. features applications n gain bandwidth product: 180mhz n C3db frequency (a v = 1): 120mhz n low quiescent current: 1ma max n high slew rate: 90v/s n input common mode range includes both rails n output swings rail-to-rail n low broadband voltage noise: 4.2nv/ hz n power-down mode: 42a n fast output recovery n supply voltage range: 2.5v to 5.25v n input offset voltage: 0.5mv max n input bias current: 100na n large output current: 50ma n cmrr: 110db n open loop gain: 45v/mv n operating temperature range: C40c to 125c n single in 6-lead tsot-23 n dual in ms8, 2mm 2mm dfn,ts0t-23, ms10 n quad in ms16 n low voltage, high frequency signal processing n driving a/d converters n rail-to-rail buffer ampliiers n active filters n video ampliiers n fast current sensing ampliiers n battery powered equipment ltc6246 + C 624678 ta01a ltc2366 v ref gnd v dd 3.3v 2.5v cs sdo sck ov dd 3.3v v in a in 4991% 499 1% 10pf frequency (khz) 0 magnitude (db) 0 C10C30 C50 C70 C20C40 C60 C80 C90 C100C110 400 800 200 600 624678 ta01b 1000 f in = 350.195khz f samp = 2.2msps sfdr = 82dbsnr = 70db 1024 point fft low noise low distortion gain = 2 adc driver 350khz fft driving adc downloaded from: http:///
ltc6246/ltc6247/ltc6248 2 624678fb for more information www.linear.com/ltc6246 absolute maximum ratings pin configuration total supply voltage (v + to v C ) ................................ 5.5 v input current (+ in , C in , shdn ) ( note 2) .............. 10 ma output current ( note 3) ..................................... 100 ma operating temperature range ( note 4) .. C 40 c to 125 c specified temperature range ( note 5) .. C 40 c to 125 c storage temperature range .................. C 65 c to 150 c junction temperature ........................................... 150 c lead temperature ( soldering , 10 sec ) ( msop , tsot packages only ) ............................... 300 c (note 1) top view 9 kc package 8-lead plastic utdfn (2mm 2mm 0.6mm) 5 6 7 8 4 3 2 1 out a ?in a+in a v ? v + out b?in b +in b +C +C t jmax = 125c, ja = 102c/w (note 9) exposed pad (pin 9) is v C , must be soldered to pcb 12 3 4 out a Cin a+in a v C 87 6 5 v + out bCin b +in b top view ms8 package 8-lead plastic msop + C +C t jmax = 150c, ja = 163c/w (note 9) 12 3 4 5 out a Cin a+in a v C shdna 109 8 7 6 v + out bCin b +in b shdnb top view ms package 10-lead plastic msop +C + C t jmax = 150c, ja = 160c/w (note 9) 12 3 4 5 6 7 8 out a Cin a+in a v + +in bCin b out b 1615 14 13 12 11 10 9 out dCin d +in d v C +in cCin c out c top view ms package 16-lead plastic msop + C + C +C +C t jmax = 150c, ja = 125c/w (note 9) out 1 v C 2 +in 3 6 v + 5 shdn 4 Cin top view s6 package 6-lead plastic tsot-23 + C t jmax = 150c, ja = 192c/w (note 9) top view out a Cin a+in a v C v + out bCin b +in b dc package 8-lead (2mm 2mm 0.8mm ) plastic dfn 9 4 1 2 3 6 5 7 8 +C +C t jmax = 125c, ja = 102c/w (note 9) exposed pad (pin 9) is v C , must be soldered to pcb out a 1 ?in a 2+in a 3 v ? 4 8 v + 7 out b6 ?in b 5 +in b top view ts8 package 8-lead plastic tsot-23 +C +C t jmax = 150c, ja = 195c/w (note 9) downloaded from: http:///
ltc6246/ltc6247/ltc6248 3 624678fb for more information www.linear.com/ltc6246 order information lead free finish tape and reel part marking* package description specified temperature range ltc6246cs6#trmpbf ltc6246cs6#trpbf ltdwf 6-lead plastic tsot-23 0c to 70c ltc6246is6#trmpbf ltc6246is6#trpbf ltdwf 6-lead plastic tsot-23 C40c to 85c ltc6246hs6#trmpbf ltc6246hs6#trpbf ltdwf 6-lead plastic tsot-23 C40c to 125c ltc6247ckc#trmpbf ltc6247ckc#trpbf dwjt 8-lead (2mm 2mm 0.6mm) utdfn 0c to 70c ltc6247ikc#trmpbf ltc6247ikc#trpbf dwjt 8-lead (2mm 2mm 0.6mm) utdfn C40c to 85c ltc6247cms8#pbf ltc6247cms8#trpbf ltdwh 8-lead plastic msop 0c to 70c ltc6247ims8#pbf ltc6247ims8#trpbf ltdwh 8-lead plastic msop C40c to 85c ltc6247cts8#trmpbf ltc6247cts8#trpbf ltdwk 8-lead plastic tsot-23 0c to 70c ltc6247its8#trmpbf ltc6247its8#trpbf ltdwk 8-lead plastic tsot-23 C40c to 85c ltc6247hts8#trmpbf ltc6247hts8#trpbf ltdwk 8-lead plastic tsot-23 C40c to 125c ltc6247cms#pbf ltc6247cms#trpbf ltdwm 10-lead plastic msop 0c to 70c ltc6247ims#pbf ltc6247ims#trpbf ltdwm 10-lead plastic msop C40c to 85c ltc6247cdc#trmpbf ltc6247cdc#trpbf lgvn 8-lead (2mm 2mm 0.8mm) dfn 0c to 70c ltc6247idc#trmpbf ltc6247idc#trpbf lgvn 8-lead (2mm 2mm 0.8mm) dfn C40c to 85c ltc6248cms#pbf ltc6248cms#trpbf 6248 16-lead plastic msop 0c to 70c ltc6248ims#pbf ltc6248ims#trpbf 6248 16-lead plastic msop C40c to 85c ltc6248hms#pbf ltc6248hms#trpbf 6248 16-lead plastic msop C40c to 125c trm = 500 pieces. *temperature grades are identified by a label on the shipping container. consult ltc marketing for parts specified with wider operating temperature ranges. consult ltc marketing for information on lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ (v s = 5v) the l denotes the specifications which apply across the specified temperature range, otherwise specifications are at t a = 25c. for each amplifier v s = 5v, 0v; v shdn = 2v; v cm = v out = 2.5v, unless otherwise noted. electrical characteristics symbol parameter conditions min typ max units v os input offset voltage v cm = half supply l C500 C1000 50 500 1000 v v v cm = v + C 0.5v, npn mode l C2.5 C3 0.1 2.5 3 mv mv ? v os input offset voltage match (channel-to-channel) (note 8) v cm = half supply l C600 C1000 50 600 1000 v v v cm = v + C 0.5v, npn mode l C3.5 C4 0.1 3.5 4 mv mv v os t c input offset voltage drift l C2 v/c i b input bias current (note 7) v cm = half supply l C350 C550 C30 350 550 na na v cm = v + C 0.5v, npn mode l 100 0 400 1000 1500 na na downloaded from: http:///
ltc6246/ltc6247/ltc6248 4 624678fb for more information www.linear.com/ltc6246 (v s = 5v) the l denotes the specifications which apply across the specified temperature range, otherwise specifications are at t a = 25c. for each amplifier v s = 5v, 0v; v shdn = 2v; v cm = v out = 2.5v, unless otherwise noted. electrical characteristics symbol parameter conditions min typ max units i os input offset current v cm = half supply l C250 C400 C10 250 400 na na v cm = v + C 0.5v, npn mode l C250 C400 C10 250 400 na na e n input noise voltage density f = 100khz 4.2 nv/ hz input 1/f noise voltage f = 0.1hz to 10hz 1.6 v p-p i n input noise current density f = 100khz 2.0 pa/ hz c in input capacitance differential mode common mode 2 0.8 pf pf r in input resistance differential mode common mode 32 14 k? m? a vol large signal voltage gain r l = 1k to half supply (note 10) l 30 14 45 v/mv v/mv r l = 100? to half supply (note 10) l 5 2.5 15 v/mv v/mv cmrr common mode rejection ratio v cm = 0v to 3.5v l 78 76 110 db db i cmr input common mode range l 0 v s v psrr power supply rejection ratio v s = 2.5v to 5.25v v cm = 1v l 69 65 73 db db supply voltage range (note 6) l 2.5 5.25 v v ol output swing low (v out C v C ) no load l 25 40 55 mv mv i sink = 5ma l 70 110 160 mv mv i sink = 25ma l 160 250 450 mv mv v oh output swing high (v + C v out ) no load l 70 100 150 mv mv i source = 5ma l 130 175 225 mv mv i source = 25ma l 300 500 750 mv mv i sc output short-circuit current sourcing l C80 C35 C30 ma ma sinking l 60 40 100 ma ma i s supply current per amplifier v cm = half supply l 0.95 1 1.4 ma ma v cm = v + C 0.5v l 1.25 1.4 1.8 ma ma i sd disable supply current per amplifier v shdn = 0.8v l 42 75 200 a a i shdnl shdn pin current low v shdn = 0.8v l C3 C4 C1.6 0 0 a a downloaded from: http:///
ltc6246/ltc6247/ltc6248 5 624678fb for more information www.linear.com/ltc6246 (v s = 2.7v) the l denotes the specifications which apply across the specified temperature range, otherwise specifications are at t a = 25c. for each amplifier v s = 2.7v, 0v; v shdn = 2v; v cm = v out = 1.35v, unless otherwise noted. electrical characteristics symbol parameter conditions min typ max units i shdnh shdn pin current high v shdn = 2v l C300 C350 35 300 350 na na v l shdn pin input voltage low l 0.8 v v h shdn pin input voltage high l 2 v i osd output leakage current magnitude in shutdown v shdn = 0.8v, output shorted to either supply 100 na t on turn-on time v shdn = 0.8v to 2v 5 s t off turn-off time v shdn = 2v to 0.8v 2 s bw C3db closed loop bandwidth a v = 1, r l = 1k to half supply 120 mhz gbw gain-bandwidth product f = 2mhz, r l = 1k to half supply l 100 70 180 mhz mhz t s , 0.1% settling time to 0.1% a v = C1, v o = 2v step r l = 1k 74 ns t s , 0.01% settling time to 0.01% a v = C1, v o = 2v step r l = 1k 202 ns sr slew rate a v = C3.33, 4.6v step (note 11) l 60 50 90 v/s v/s fpbw full power bandwidth v out = 4v p-p (note 13) 4 mhz hd2/hd3 harmonic distortion r l = 1k to half supply f c = 100khz, v o = 2v p-p f c = 1mhz, v o = 2v p-p f c = 2mhz, v o = 2v p-p 110/90 88/80 78/62 dbc dbc dbc r l = 100? to half supply f c = 100khz, v o = 2v p-p f c = 1mhz, v o = 2v p-p f c = 2mhz, v o = 2v p-p 90/79 66/60 59/51 ? g differential gain (note 14) a v = 1, r l = 1k, v s = 2.5v 0.2 % ? differential phase (note 14) a v = 1, r l = 1k, v s = 2.5v 0.08 deg crosstalk a v = C1, r l = 1k to half supply, v out = 2v p-p , f = 1mhz C90 db (v s = 5v) the l denotes the specifications which apply across the specified temperature range, otherwise specifications are at t a = 25c. for each amplifier v s = 5v, 0v; v shdn = 2v; v cm = v out = 2.5v, unless otherwise noted. electrical characteristics symbol parameter conditions min typ max units v os input offset voltage v cm = half supply l C100 C300 500 1000 1400 v v v cm = v + C 0.5v, npn mode l C1.75 C2.25 0.75 3.25 3.75 mv mv ? v os input offset voltage match (channel-to-channel) (note 8) v cm = half supply l C700 C1000 C20 700 1000 v v v cm = v + C 0.5v, npn mode l C3.5 C4 0.1 3.5 4 mv mv v os t c input offset voltage drift l 2 v/c downloaded from: http:///
ltc6246/ltc6247/ltc6248 6 624678fb for more information www.linear.com/ltc6246 electrical characteristics (v s = 2.7v) the l denotes the specifications which apply across the specified temperature range, otherwise specifications are at t a = 25c. for each amplifier v s = 2.7v, 0v; v shdn = 2v; v cm = v out = 1.35v, unless otherwise noted. symbol parameter conditions min typ max units i b input bias current (note 7) v cm = half supply l C450 C600 C100 450 600 na na v cm = v + C 0.5v, npn mode l 50 0 350 1000 1500 na na i os input offset current v cm = half supply l C250 C350 C10 250 350 na na v cm = v + C 0.5v, npn mode l C250 C350 C10 250 350 na na e n input noise voltage density f = 100khz 4.6 nv/ hz input 1/f noise voltage f = 0.1hz to 10hz 1.7 v p-p i n input noise current density f = 100khz 1.8 pa/ hz c in input capacitance differential mode common mode 2 0.8 pf pf r in input resistance differential mode common mode 32 12 k? m? a vol large signal voltage gain r l = 1k to half supply (note 12) l 15 7.5 25 v/mv v/mv r l = 100? to half supply (note 12) l 2 1.3 7.5 v/mv v/mv cmrr common mode rejection ratio v cm = 0v to 1.2v l 80 78 100 db db i cmr input common mode range l 0 v s v psrr power supply rejection ratio v s = 2.5v to 5.25v v cm = 1v l 69 65 73 db db supply voltage range (note 6) l 2.5 5.25 v v ol output swing low (v out C v C ) no load l 20 40 55 mv mv i sink = 5ma l 80 125 160 mv mv i sink = 10ma l 110 175 225 mv mv v oh output swing high (v + C v out ) no load l 60 85 100 mv mv i source = 5ma l 135 190 225 mv mv i source = 10ma l 180 275 400 mv mv i sc short circuit current sourcing l C35 C20 C15 ma ma sinking l 25 20 50 ma ma i s supply current per amplifier v cm = half supply l 0.89 1 1.3 ma ma v cm = v + C 0.5v l 1 1.3 1.7 ma ma downloaded from: http:///
ltc6246/ltc6247/ltc6248 7 624678fb for more information www.linear.com/ltc6246 electrical characteristics (v s = 2.7v) the l denotes the specifications which apply across the specified temperature range, otherwise specifications are at t a = 25c. for each amplifier v s = 2.7v, 0v; v shdn = 2v; v cm = v out = 1.35v, unless otherwise noted. symbol parameter conditions min typ max units i sd disable supply current per amplifier v shdn = 0.8v l 22 50 90 a a i shdn l shdn pin current low v shdn = 0.8v l C1 C1.5 C0.5 0 0 a a i shdn h shdn pin current high v shdn = 2v l C300 C350 45 300 350 na na v l shdn pin input voltage l 0.8 v v h shdn pin input voltage l 2.0 v i osd output leakage current magnitude in shutdown v shdn = 0.8v, output shorted to either supply 100 na t on turn-on time v shdn = 0.8v to 2v 5 s t off turn-off time v shdn = 2v to 0.8v 2 s bw C3db closed loop bandwidth a v = 1, r l = 1k to half supply 100 mhz gbw gain-bandwidth product f = 2mhz, r l = 1k to half supply l 80 50 150 mhz t s , 0.1 settling time to 0.1% a v = C1, v o = 2v step r l = 1k 119 ns t s , 0.01 settling time to 0.01% a v = C1, v o = 2v step r l = 1k 170 ns sr slew rate a v = C1, 2v step 55 v/s fpbw full power bandwidth v out = 2v p-p (note 13) 3.3 mhz crosstalk a v = C1, r l = 1k to half supply, v out = 2v p-p , f = 1mhz C90 db note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the inputs are protected by back-to-back diodes. if any of the input or shutdown pins goes 300mv beyond either supply or the differential input voltage exceeds 1.4v the input current should be limited to less than 10ma. this parameter is guaranteed to meet specified performance through design and/or characterization. it is not production tested. note 3: a heat sink may be required to keep the junction temperature below the absolute maximum rating when the output current is high.note 4: the ltc6246c/ltc6247c/ltc6248c and ltc6246i/ltc6247i/ ltc6248i are guaranteed functional over the temperature range of C40c to 85c. the ltc6246h/ltc6247h/ltc6248h are guaranteed functional over the temperature range of C40c to 125c. note 5: the ltc6246c/ltc6247c/ltc6248c are guaranteed to meet specified performance from 0c to 70c. the ltc6246c/ltc6247c/ ltc6248c are designed, characterized and expected to meet specified performance from C40c to 85c but are not tested or qa sampled at these temperatures. the ltc6246i/ltc6247i/ltc6248i are guaranteed to meet specified performance from C40c to 85c. the ltc6246h/ ltc6247h/ltc6248h are guaranteed to meet specified performance from C40c to 125c. note 6: minimum supply voltage is guaranteed by power supply rejection ratio test.note 7: the input bias current is the average of the average of the currents through the positive and negative input pins.note 8: matching parameters are the difference between amplifiers a and d and between b and c on the ltc6248; between the two amplifiers on the ltc6247. note 9: thermal resistance varies with the amount of pc board metal connected to the package. the specified values are with short traces connected to the leads with minimal metal area. note 10: the output voltage is varied from 0.5v to 4.5v during measurement. note 11: middle 80% of the output waveform is observed. r l = 1k at half supply.note 12: the output voltage is varied from 0.5v to 2.2v during measurement.note 13: fpbw is determined from distortion performance in a gain of +2 configuration with hd2, hd3 < C40dbc as the criteria for a valid output.note 14: differential gain and phase are measured using a tektronix tsg120yc/ntsc signal generator and a tektronix 1780r video measurement set. downloaded from: http:///
ltc6246/ltc6247/ltc6248 8 624678fb for more information www.linear.com/ltc6246 v os distribution, v cm = v s /2 (ms, pnp stage) v os distribution, v cm = v s /2 (tsot-23, pnp stage) v os distribution, v cm = v + C 0.5v (ms, npn stage) typical performance characteristics input offset voltage (v) percent of units (%) 2220 16 12 82 1814 10 64 0 C50 C150 150 624678 g01 350 250 C250 C375 50 v s = 5v, 0v v cm = 2.5v input offset voltage (v) percent of units (%) 25 15 5 2010 0 C125 C25 C75 624678 g02 75 125 25 175 C175 v s = 5v, 0v v cm = 2.5v input offset voltage (v) percent of units (%) 1612 82 1410 64 0 C1200 400 C400 624678 g03 1200 2000 C2000 v s = 5v, 0v v cm = 4.5v offset voltage vs input common mode voltage v os vs temperature (ms10, pnp stage) v os distribution, v cm = v + C 0.5v (tsot-23, npn stage) v os vs temperature (ms10, npn stage) v os vs temperature (ms10, pnp stage) v os vs temperature (ms10, npn stage) input common mode voltage (v) 0 offset voltage (v) 500 400100 200 C300 300 0 C100C200 C400 C500 1.5 3.5 1 2.5 4.5 624678 g09 5 3 0.5 2 4 C55c v s = 5v, 0v 125c 25c input offset voltage (v) percent of units (%) 18 12 1410 4 16 86 2 0 C1200 624678 g04 400 1200 C400 2000 C2000 v s = 5v, 0v v cm = 4.5v temperature (c) voltage offset (v) 500 200 300100 C200 400 0 C100C300 C400 C15 C35 624678 g05 5 25 65 85 105 125 C55 v s = 5v, 0v v cm = 2.5v 6 devices 45 temperature (c) voltage offset (v) 2500 1000 1500 500 C1000 2000 0 C500 C1500C2000 C2500 C15 C35 624678 g06 5 25 65 85 105 125 C55 v s = 5v, 0v v cm = 4.5v 6 devices 45 temperature (c) voltage offset (v) 12001000 800600 400 200 0 C15 C35 624678 g07 5 25 65 85 105 125 C55 v s = 2.7v, 0v v cm = 1.35v 6 devices 45 temperature (c) voltage offset (v) 2500 20001500 1000 500 0 C1500 C1000 C500 C2000 C15 C35 624678 g08 5 25 65 85 105 125 C55 v s = 2.7v, 0v v cm = 2.2v 6 devices 45 downloaded from: http:///
ltc6246/ltc6247/ltc6248 9 624678fb for more information www.linear.com/ltc6246 typical performance characteristics offset voltage vs output current warm-up drift vs time input bias current vs common mode voltage output current (ma) C100 v os (mv) 2.01.5 0.5 C1.0 1.0 0 C0.5C1.5 C2.0 C75 25 C25 75 624678 g10 100 0 C50 50 25c 125c C55c v s = 2.5v time after power-up (s) 0 change in offset voltage (v) 5 0 C10C25 C5 C15C20 C30 C35 20 100 60 140 624678 g11 160 80 40 120 v s = 2.5v t a = 25c common mode voltage (v) 0 input bias current (na) 800 600200 C200C600 C1200 400 0 C400C800 C1000C1400 C1600 1.5 3.5 1 2.5 4.5 624678 g12 5 3 0.5 2 4 25c 125c C55c v s = 5v, 0v supply current per amplifier vs shdn pin voltage shdn pin current vs shdn pin voltage input noise voltage and noise current vs frequency input bias current vs temperature supply current vs supply voltage (per amplifier) 0.1hz to 10hz voltage noise time (1s/div) 0 voltage noise (500nv/div) 1.5 v s = 2.5v 1.00.5 0 0.5 C1.0C1.5 1 7 3 9 624678 g14 10 4 5 6 2 8 total supply voltage (v) 0 supply current (ma) 1.201.00 0.80 0.60 0.40 0.20 0 1 3 624678 g16 t a = 125c t a = 25c t a = C55c 4 5 2 temperature (c) C55 input bias current (na) 700600 300 C100 400 500 0 200100 C200 35 5 C25 95 624678 g13 125 65 v s = 5v, 0v v cm = 4.5v v cm = 2.5v frequency (hz) 1 voltage noise (nv/ hz ) current noise (pa/ hz ) 1000 e n , v cm = 4.5v e n , v cm = 2.5v i n , v cm = 2.5v i n , v cm = 4.5v 100 10 1.00.1 10 1k 10m 624678 g15 10k 100k 1m 100 shdn pin voltage (v) 0 supply current (ma) 1.25 1.000.75 0.50 0.25 0 2.5 2 1.5 1 0.5 3.5 624678 g17 5 125c v s = 5v, 0v 25c C55c 4 4.5 3 shdn pin voltage (v) 0 shdn pin current (a) 0.25 0 C0.25C0.50 C0.75 C1.00 C1.25 C1.50 C1.75 C2.00 C2.25 C2.50 2.5 2 1.5 1 0.5 3.5 624678 g18 5 125c v s = 5v, 0v shutdown current 25c C55c 4 4.5 3 downloaded from: http:///
ltc6246/ltc6247/ltc6248 10 624678fb for more information www.linear.com/ltc6246 typical performance characteristics output saturation voltage vs load current (output high) minimum supply voltage, v cm = v s /2 (pnp operation) minimum supply voltage, v cm = v + C 0.5v (npn operation) total supply voltage (v) 2 offset voltage (mv) 12 10 86 4 2 0 C2 2.5 3.5 624678 g19 5.5 125c 25c C55c 4 4.5 5 3 total supply voltage (v) 2 offset voltage (mv) 5 43 2 1 0 C1 2.5 3.5 624678 g20 5.5 125c 25c C55c 4 4.5 5 3 v cm = v cc C 0.5v load current (ma) output high saturation voltage (v) 624678 g21 10 1 0.1 0.01 0.01 10 100 1 0.1 v s = 2.5v t a = C55c t a = 125c t a = 25c gain vs frequency (a v = 1) gain vs frequency (a v = 2) open loop gain output short-circuit current vs power supply voltage open loop gain output saturation voltage vs load current (output low) load current (ma) output low saturation voltage (v) 624678 g22 10 1 0.1 0.01 0.01 10 100 1 0.1 v s = 2.5v t a = C55c t a = 125c t a = 25c output voltage (v) 0 input voltage (v) 500400 300 200 100 0 C100C200 C300 C400 C500 2.5 3.5 624678 g24 5 r l = 1k to mid supply r l = 1k to ground r l = 100 to mid supply r l = 100 to ground t a = 25c v s = 5v, 0v 4 4.5 2 1.5 1 0.5 3 output voltage (v) 0 input voltage (v) 1000 900500 600 700 800400 300 200 100 0 C100C200 C300 2.5 624678 g25 2.7 r l = 1k to mid supply r l = 1k to ground r l = 100 to mid supply r l = 100 to ground t a = 25c v s = 2.7v, 0v 2 1.5 1 0.5 power supply voltage (v) 1.25 output short-circuit current (ma) 120 100 8060 40 20 0 C20C40 C60 C80 C100 1.65 1.45 2.05 624678 g23 2.65 t a = 125c t a = 125c sink source t a = 25c t a = 25c t a = C55c t a = C55c 2.25 2.45 1.85 frequency (mhz) gain (db) 624678 g26 6 0 C18 C12 C6 C24 0.01 10 100 1 0.1 v s = 2.5v t a = 25c r l = 1k frequency (mhz) gain (db) 624678 g27 12 0 6 C12 C6 C18 0.01 10 100 1 0.1 v s = 2.5v t a = 25c r f = r g = 1k r l = 1k downloaded from: http:///
ltc6246/ltc6247/ltc6248 11 624678fb for more information www.linear.com/ltc6246 typical performance characteristics open loop gain and phase vs frequency gain bandwidth and phase margin vs supply voltage gain bandwidth and phase margin vs temperature frequency (hz) gain (db) phase (deg) 624678 g28 80 10 20 30 40 50 60 70 C10 0 C20 150 0 50 100C50 C100 100k 100m 300m 10m 1m t a = 25c r l = 1k v s = 2.5v phase gain v s = 1.35v v s = 2.5v v s = 1.35v total supply voltage (v) 2.5 gain bandwidth (mhz) phase margin (deg) 200180 160 140 120 100 70 6050 3 3.5 4.5 phase margin gain bandwidth product 624678 g29 t a = 25c r l = 1k 5 4 temperature (c) C55 gain bandwidth (mhz) phase margin (deg) 300250 200 150 100 60 70 5040 C35 C15 45 25 phase margin gain bandwidth product 624678 g30 125 t a = 25c r l = 1k 65 85 105 5 v s = 2.5v v s = 1.35v v s = 2.5v v s = 1.35v power supply rejection ratio vs frequency series output resistor vs capacitive load (a v = 1) series output resistor vs capacitive load (a v = 2) output impedance vs frequency common mode rejection ratio vs frequency slew rate vs temperature frequency (hz) output impedance () 624678 g31 1000 10 100 1 0.1 0.01 0.001 100k 100m 1g 10m 1m v s = 2.5v a v = 10 a v = 1 a v = 2 frequency (hz) common mode rejection ratio (db) 624678 g31 110 9080 70 60 50 40 30 100 2010 0 C10 10 100 1k 10k 100k 100m 1g 10m 1m t a = 25c v s = 2.5v frequency (hz) 10 power supply rejection ratio (db) 5040 30 20 10 70 8060 0 C10 100 1k 100k negative supply positive supply 624678 g33 v s = 2.5v t a = 25c 100m 10m 1m 10k temperature (c) C55 slew rate (v/s) 140 falling, v s = 2.5v rising, v s = 2.5v falling, v s = 1.35v rising, v s = 1.35v 120100 8060 40 C35 45 25 5 C15 85 624678 g34 125 a v = C1, r l = 1k, v out = 4v p-p (2.5v), 2v p-p (1.35v) slew rate measured at middle 2/3 of output 105 65 capacitive load (pf) 10 overshoot (%) 80 7060 50 40 30 20 10 0 100 10000 1000 624678 g35 v s = 2.5v v out = 100mv p-p a v = 1 r s = 20 r s = 49.9 r s = 10 +? r s c l v out v in a v = 1 capacitive load (pf) 10 overshoot (%) 80 7060 50 40 30 20 10 0 100 10000 1000 624678 g36 v s = 2.5v v out = 200mv p-p r f = r g = 500, a v = 2 r s = 20? r s = 49.9? r s 500? 500? c l v out v in a v = 2 r s = 10? +C downloaded from: http:///
ltc6246/ltc6247/ltc6248 12 624678fb for more information www.linear.com/ltc6246 typical performance characteristics distortion vs frequency (a v = 1, 5v) distortion vs frequency (a v = 2, 5v) distortion vs frequency (a v = 1, 2.7v) frequency (mhz) 0.01 distortion (dbc) C40 C50C60 C70 C80 C90 C100C110 C120 0.1 10 1 624678 g37 v s = 2.5v v out = 2v p-p a v = 1 r l = 100, 2nd r l = 1k, 3rd r l = 1k, 2nd r l = 100, 3rd frequency (mhz) 0.01 distortion (dbc) C40 C50C60 C70 C80 C90 C100C110 C120 0.1 10 1 624678 g38 v s = 1.35v v out = 1v p-p a v = 1 r l = 100, 2nd r l = 1k, 3rd r l = 1k, 2nd r l = 100, 3rd frequency (mhz) 0.01 distortion (dbc) C40 C50C60 C70 C80 C90 C100C110 C120 0.1 10 1 624678 g39 v s = 2.5v v out = 2v p-p a v = 2 r l = 100, 2nd r l = 1k, 3rd r l = 1k, 2nd r l = 100, 3rd settling time vs output step (noninverting) distortion vs frequency a v = 2, 2.7v) maximum undistorted output signal vs frequency output step (v) C4 settling time (ns) 200180 160 140 40 60 80 100 120 20 0 C3 C1 624678 g42 4 1mv 1mv 10mv 10mv 0 1 3 2 C2 v s = 2.5v a v = 1 t a = 25c 1k v out v in +C frequency (mhz) 0.01 distortion (dbc) C40 C50C60 C70 C80 C90 C100C110 C120 0.1 10 1 624678 g40 v s = 1.35v v out = 1v p-p a v = 2 r l = 100, 2nd r l = 1k, 3rd r l = 1k, 2nd r l = 100, 3rd frequency (mhz) 0.01 output voltage swing (v p-p ) 5 43 2 1 0 0.1 10 1 624678 g41 v s = 2.5v t a = 25c r l = 1k hd2, hd3 < ?40dbc a v = 2 a v = ?1 downloaded from: http:///
ltc6246/ltc6247/ltc6248 13 624678fb for more information www.linear.com/ltc6246 typical performance characteristics large signal response small signal response output overdriven recovery settling time vs output step (inverting) shdn pin response time output step (v) C4 settling time (ns) 200 180160 140 40 60 80 100 120 20 0 C3 C1 624678 g43 4 10mv 0 1 3 2 C2 1k 1k 1k v out v in v s = 2.5v a v = C1 t a = 25c 1mv 10mv 1mv +C v out 1.6v/div a v = 1 v s = 2.5v r l = 1k v in = 1.6v v shdn 2.5v/div 0v0v 624678 g44 10s/div 1v/div 0v a v = 1 v s = 2.5v r l = 1k 624678 g45 200ns/div 25mv/div 0v a v = 1 v s = 2.5v r l = 1k 624678 g46 50ns/div v out 2v/div a v = 2 v s = 2.5v r l = 1k v in = 3v p-p v in 1v/div 0v 0v 624678 g47 100ns/div downloaded from: http:///
ltc6246/ltc6247/ltc6248 14 624678fb for more information www.linear.com/ltc6246 applications information circuit description the ltc6246 / ltc6247 / ltc6248 have an input and output signal range that extends from the negative power supply to the positive power supply . figure 1 depicts a simplified schematic of the amplifier . the input stage is comprised of two differential amplifiers , a pnp stage , q 1/q2, and an npn stage , q 3/q4 that are active over different common mode input voltages . the pnp stage is active between the negative supply to nominally 1.2 v below the posi - tive supply . as the input voltage approaches the positive supply, the transistor q 5 will steer the tail current , i 1 , to the current mirror , q 6/q7, activating the npn differential pair and the pnp pair becomes inactive for the remain - ing input common mode range . also , at the input stage , devices q 17 to q 19 act to cancel the bias current of the pnp input pair . when q 1/q2 are active , the current in q16 is controlled to be the same as the current in q 1 and q2. thus , the base current of q 16 is nominally equal to the base current of the input devices . the base current of q 16 is then mirrored by devices q 17 to q 19 to cancel the base current of the input devices q 1/q2. a pair of complementary common emitter stages , q 14/ q 15, enable the output to swing from rail-to-rail. figure 1. ltc6246/ltc6247/ltc6248 simplified schematic diagram Cin: inverting input of amplifier . valid input range from v C to v + . +in: non-inverting input of amplifier . valid input range from v C to v + . v + : positive supply voltage . allowed applied voltage ranges from 2.5v to 5.25v when v C = 0v. v C : negative supply voltage . typically 0v. this can be made a negative voltage as long as 2.5v (v + C v C ) 5.25v. shdn : active low shutdown . threshold is typically 1.1v referenced to v C . floating this pin will turn the part on. out : amplifier output . swings rail-to-rail and can typically source/ sink over 50 ma of current at a total supply of 5v. pin functions 624678 f01 q15 esdd5 q14 c2 c1 buffer and output bias r5 r4 q13 q12 i 3 v C + c c q8 r3 q11 q9 q10 r2 r1 q2 q1 q3 q4 i 1 + i 2 + v bias q5 q6 q19 q7 d8d7 q18 q17 d6d5 esdd2 v C esdd1 v + esdd4 v C esdd3 v + q16 v C v + +inCin esdd6 out downloaded from: http:///
ltc6246/ltc6247/ltc6248 15 624678fb for more information www.linear.com/ltc6246 applications information input offset voltage the offset voltage will change depending upon which input stage is active . the pnp input stage is active from the negative supply rail to approximately 1.2 v below the positive supply rail , then the npn input stage is activated for the remaining input range up to the positive supply rail with the pnp stage inactive . the offset voltage magnitude for the pnp input stage is trimmed to less than 500 v with 5 v total supply at room temperature , and is typically less than 150v. the offset voltage for the npn input stage is typically less than 1.7 mv with 5 v total supply at room temperature. input bias current the ltc6246 family uses a bias current cancellation cir - cuit to compensate for the base current of the pnp input pair. when the input common mode voltage is less than 200mv, the bias cancellation circuit is no longer effective and the input bias current magnitude can reach a value above 1a. for common mode voltages ranging from 0.2 v above the negative supply to 1.2 v below the positive supply, the low input bias current of the ltc6246 family allows the amplifiers to be used in applications with high source resistances where errors due to voltage drops must be minimized. output the ltc6246 family has excellent output drive capability . the amplifiers can typically deliver over 50 ma of output drive current at a total supply of 5v. the maximum out - put current is a function of the total supply voltage . as the supply voltage to the amplifier decreases , the output current capability also decreases . attention must be paid to keep the junction temperature of the ic below 150c ( refer to the power dissipation section ) when the output is in continuous short circuit . the output of the amplifier has reverse-biased diodes connected to each supply . if the output is forced beyond either supply , extremely high current will flow through these diodes which can result in damage to the device . forcing the output to even 1v beyond either supply could result in several hundred mil - liamps of current through either diode. input protectionthe input stages are protected against a large differential input voltage of 1.4 v or higher by 2 pairs of back-to-back diodes to prevent the emitter-base breakdown of the input transistors. in addition , the input and shutdown pins have reverse biased diodes connected to the supplies . the cur - rent in these diodes must be limited to less than 10ma. the amplifiers should not be used as comparators or in other open loop applications. esd the ltc6246 family has reverse-biased esd protection diodes on all inputs and outputs as shown in figure 1. there is an additional clamp between the positive and negative supplies that further protects the device during esd strikes . hot plugging of the device into a powered socket must be avoided since this can trigger the clamp resulting in larger currents flowing between the supply pins . capacitive loads the ltc6246/ltc6247/ltc6248 are optimized for high bandwidth and low power applications . consequently they have not been designed to directly drive large capacitive loads. increased capacitance at the output creates an ad - ditional pole in the open loop frequency response , wors - ening the phase margin . when driving capacitive loads , a resistor of 10 to 100 should be connected between the amplifier output and the capacitive load to avoid ringing or oscillation . the feedback should be taken directly from the amplifier output . higher voltage gain configurations tend to have better capacitive drive capability than lower gain configurations due to lower closed loop bandwidth and hence higher phase margin . the graphs titled series output resistor vs capacitive load demonstrate the tran - sient response of the amplifier when driving capacitive loads with various series resistors. downloaded from: http:///
ltc6246/ltc6247/ltc6248 16 624678fb for more information www.linear.com/ltc6246 applications information figure 2. 5pf feedback cancels parasitic pole feedback componentswhen feedback resistors are used to set up gain , care must be taken to ensure that the pole formed by the feedback resistors and the parasitic capacitance at the inverting input does not degrade stability . for example if the amplifier is set up in a gain of +2 configuration with gain and feedback resistors of 5k, a parasitic capacitance of 5pf (device + pc board ) at the amplifier s inverting input will cause the part to oscillate , due to a pole formed at 12.7mhz. an additional capacitor of 5 pf across the feedback resistor as shown in figure 2 will eliminate any ringing or oscillation . in general , if the resistive feedback network results in a pole whose frequency lies within the closed loop bandwidth of the amplifier , a capacitor can be added in parallel with the feedback resistor to introduce a zero whose frequency is close to the frequency of the pole, improving stability. 624678 f02 c par 5k C + v out v in 5k 5pf power dissipation the ltc6246 and ltc6247 contain one and two ampli - fiers respectively . hence the maximum on-chip power dissipation for them will be less than the maximum on-chip power dissipation for the ltc6248, which contains four amplifiers. the ltc6248 is housed in a small 16 -lead ms package and typically has a thermal resistance ( ja ) of 125c/ w . it is necessary to ensure that the die s junction temperature does not exceed 150c. the junction temperature , t j , is calculated from the ambient temperature , t a , power dis - sipation, pd, and thermal resistance, ja : t j = t a + (p d ? ja ) the power dissipation in the ic is a function of the supply voltage, output voltage and load resistance . for a given supply voltage with output connected to ground or supply , the worst-case power dissipation p d(max) occurs when the supply current is maximum and the output voltage at half of either supply voltage for a given load resistance . p d(max) is approximately (since i s actually changes with output load current) given by: p d(max) = (v s i s(max) ) + v s 2 ?? ? ?? ? 2 / r l example: for an ltc6248 in a 16 -lead ms package operat - ing on 2.5 v supplies and driving a 100 load to ground , the worst-case power dissipation is approximately g iven by p d(max) /amp = (5 ? 1.3ma) + (1.25) 2 /100 = 22mw if all four amplifiers are loaded simultaneously then the total power dissipation is 88mw. at the absolute maximum ambient operating temperature , the junction temperature under these conditions will be: t j = t a + p d ? 125c/w = 125 + (0.088w ? 125c/w) = 136c which is less than the absolute maximum junction tem - perature for the ltc6248 (150c).refer to the pin configuration section for thermal resis - tances of various packages. shutdownthe ltc6246 and ltc6247ms have shdn pins that can shut down the amplifier to 42 a typical supply current . the shdn pin needs to be taken below 0.8 v above the negative supply for the amplifier to shut down . when left floating, the shdn pin is internally pulled up to the posi - tive supply and the amplifier remains on. downloaded from: http:///
ltc6246/ltc6247/ltc6248 17 624678fb for more information www.linear.com/ltc6246 figure 3. single supply 12-bit adc driver typical applications 12-bit adc driverfigure 3 shows the ltc6246 driving an ltc2366 12 -bit a /d converter. the low wideband noise of the ltc6246 main - tains a 70 db snr even without the use of an intermediate antialiasing rc filter . on a single 3.3 v supply with a 2.5v reference, a full C1 dbfs output can be obtained without the amplifier transitioning between input regions , thus minimizing crossover distortion . figure 4 shows an fft obtained with a sampling rate of 2.2 msps and a 350khz input waveform . spurious free dynamic range is a quite handsome 82db. ltc6246 + C 624678 f03 ltc2366 v ref gnd v dd 3.3v 2.5v cs sdo sck ov dd 3.3v v in a in 4991% 499 1% 10pf figure 4. 350khz fft showing 82db sfdr frequency (khz) 0 magnitude (db) 0 C10C30 C50 C70 C20C40 C60 C80 C90 C100C110 400 800 200 600 624678 f04 1000 f in = 350.195khz f samp = 2.2msps sfdr = 82dbsnr = 70db 1024 point fft c3 0.1f ltc6246 C + 624678 f05 3v lt6003 C + 3v 3v 3v v out = v r + i pd ? 1m C3db bw = 700khzi cc = 2.2ma output noise = 160v rms measured on a 1mhz bw v out is referred to v r at zero photocurrent, v out = v r v r r1 1m, 1% r31k r21k c26.8nf film or npo q1nxp bf862 pd1 osram sfh213 i pd r5 20k r4 10k r6 10m c1 0.1pf r7 1k c41f low noise low power dc-accurate single supply photodiode amplifier figure 5 shows the ltc6246 applied as a low power high performance transimpedance amplifier for a photodiode . a low noise jfet q 1 acts as a current buffer , with r 2 and r3 imposing a low frequency gain of approximately 1. transimpedance gain is set by feedback resistor r 1 to 1m. r 4 and r 5 set the ltc6246 inputs at 1 v below the 3 v rail , with c 3 reducing their noise contribution . by feedback this 1 v also appears across r 2, setting the jfet quiescent current at 1 ma completely independent of its pinchoff voltage and i dss characteristics . it does this by placing the jfets 1 ma v gs at the gate referenced to the source, which is sitting 1 v above ground . for this jfet , that will typically be about 500mv, and this voltage is imposed as a reverse voltage on the photodiode pd1. at zero i pd photocurrent , the output sits at the same volt - age and rises as photocurrent increases . as mentioned before, r 2 and r 3 set the jfet gain to 1 at low frequency . figure 5. low noise low power dc accurate single supply photodiode amplifier downloaded from: http:///
ltc6246/ltc6247/ltc6248 18 624678fb for more information www.linear.com/ltc6246 this is not the lowest noise configuration for a transistor , as downstream noise sources appear at the input completely unattenuated. at low frequency , this is not a concern for a transimpedance amplifier because the noise gain is 1 and the output noise is dominated by the 130nv / hz of the 1m r1. however , at increasing frequencies the capacitance of the photodiode comes into play and the circuit noise gain rises as the 1m feedback looks back into lower and lower impedance . but capacitor c 2 comes to the rescue . in addition to the obvious quenching of noise source r 3, capacitor c2 increases the jfet gain to about 30 at high frequency effectively attenuating the downstream noise contributions of r 2 and the op amp input noise . thus the circuit achieves low input voltage noise at high frequency where it is most needed . amplifier lt6003 is used to buffer the output voltage of the photodiode and r 7 and c4 are used to filter out the voltage noise of the lt6003. bandwidth to 700 khz was achieved with this circuit , with integrated output noise being 160v rms up to 1mhz. total supply current was a very low 2.2ma. typical applications 60db 5.5mhz gain block figure 6 shows the ltc6247 configured as a low power high gain high bandwidth block . two amplifiers each configured with a gain of 31v/v, are cascaded in series . a 660 nf capacitor is used to limit the dc gain of the block to around 30 db to minimize output offset voltage . figure 7 shows the frequency response of the block . mid-band voltage gain is approximately 60 db with a C3 db frequency of 5.5mhz, thus resulting in a gain-bandwidth product of 5.5ghz with only 1.9ma of quiescent supply current. single 2.7v supply 4mhz 4th order butterworth filter benefitting from low voltage operation and rail-to-rail output, a low power filter that is suitable for antialiasing can be built as shown in figure 8. on a 2.7 v supply the filter has a passband of approximately 4 mhz with 2v p-p input signal and a stopband attenuation that is greater than C75 db at 43 mhz as shown in figure 9. the resistor and capacitor values can be scaled to reduce noise at the cost of large signal power consumption and distortion. 624678 f06 C + 1k 2.5v C2.5v 2.5v C2.5v v in 1/2ltc6247 50 1.5k C + 1/2ltc6247 660nf v out 30k figure 6. 60db 5.5mhz gain block frequency (khz) 10k gain (db) 65 6050 40 30 5545 35 25 20 1m 100k 10m 624678 f07 v s = 2.5v v in = 4.5mv p-p r l = 1k dc gain = 30db(due to 660nf dc blocking cap) output offset = 4mv figure 7 figure 8. single 2.7v supply 4mhz 4th order butterworth filter 624678 f08 56pf C + v in 1.1k 2.3k 1/2ltc6247 12pf 2.7k 2.7v 1.2v 910 910 C + 1/2ltc6247 120pf 2.7v v out 5.6pf 1.1k frequency (khz) 10k gain (db) 10 C10C30 C50 C70 C20C40 C60 C80 C90 0 C100 100k 10m 1m 624678 f09 100m v s = 2.7v, 0v v in = 2v p-p r l = 1k to 0v figure 9 downloaded from: http:///
ltc6246/ltc6247/ltc6248 19 624678fb for more information www.linear.com/ltc6246 package description package description please refer to http:// www .linear.com/designtools/packaging/ for the most recent package drawings. 2.00 0.10 2.00 0.10 note:1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 0.64 0.10 0.55 0.05 r = 0.115 typ r = 0.05 typ 1.35 ref 1.37 0.10 1 4 8 5 pin 1 bar top mark (see note 6) 0.125 ref 0.00 C 0.05 (kc8) utdfn 0107 rev? 0.23 0.05 0.45 bsc 0.25 0.05 1.35 ref recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.64 0.05 1.37 0.05 1.15 0.05 0.70 0.05 2.55 0.05 packageoutline 0.45 bsc pin 1 notch r = 0.20 or 0.25 45 chamfer kc package 8-lead plastic utdfn (2mm 2mm) (reference ltc dwg # 05-08-1749 rev ?) msop (ms8) 0213 rev g 0.53 0.152 (.021 .006) seating plane note:1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 C 0.38 (.009 C .015) typ 0.1016 0.0508 (.004 .002) 0.86 (.034) ref 0.65 (.0256) bsc 0 C 6 typ detail a detail a gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 5.10 (.201) min 3.20 C 3.45 (.126 C .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660 rev g) downloaded from: http:///
ltc6246/ltc6247/ltc6248 20 624678fb for more information www.linear.com/ltc6246 package description package description please refer to http:// www .linear.com/designtools/packaging/ for the most recent package drawings. msop (ms) 0213 rev f 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 C?0.27 (.007 C .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 1 2 3 4 5 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8910 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note:1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 C 6 typ detail a detail a gauge plane 5.10 (.201) min 3.20 C 3.45 (.126 C .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 0.1016 0.0508 (.004 .002) ms package 10-lead plastic msop (reference ltc dwg # 05-08-1661 rev f) downloaded from: http:///
ltc6246/ltc6247/ltc6248 21 624678fb for more information www.linear.com/ltc6246 package description package description please refer to http:// www .linear.com/designtools/packaging/ for the most recent package drawings. msop (ms16) 0213 rev a 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 C?0.27 (.007 C .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 16151413121110 1 2 3 4 5 6 7 8 9 note:1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 C 6 typ detail a detail a gauge plane 5.10 (.201) min 3.20 C 3.45 (.126 C .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 4.039 0.102 (.159 .004) (note 3) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) ms package 16-lead plastic msop (reference ltc dwg # 05-08-1669 rev a) downloaded from: http:///
ltc6246/ltc6247/ltc6248 22 624678fb for more information www.linear.com/ltc6246 package description package description please refer to http:// www .linear.com/designtools/packaging/ for the most recent package drawings. 1.50 C 1.75 (note 4) 2.80 bsc 0.30 C 0.45 6 plcs (note 3) datum a 0.09 C 0.20 (note 3) s6 tsot-23 0302 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 C 0.90 1.00 max 0.01 C 0.10 0.20 bsc 0.30 C 0.50 ref pin one id note:1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 ma x 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref s6 package 6-lead plastic tsot-23 (reference ltc dwg # 05-08-1636) downloaded from: http:///
ltc6246/ltc6247/ltc6248 23 624678fb for more information www.linear.com/ltc6246 package description package description please refer to http:// www .linear.com/designtools/packaging/ for the most recent package drawings. 2.00 0.10 (4 sides) note:1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 0.64 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 1.37 0.10 (2 sides) 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0.00 C 0.05 (dc8) dfn 0409 reva 0.23 0.05 0.45 bsc 0.25 0.05 1.37 0.05 (2 sides) recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.64 0.05 (2 sides) 1.15 0.05 0.70 0.05 2.55 0.05 packageoutline 0.45 bsc pin 1 notch r = 0.20 or 0.25 45 chamfer dc8 package 8-lead plastic dfn (2mm 2mm) (reference ltc dwg # 05-08-1719 rev a) downloaded from: http:///
ltc6246/ltc6247/ltc6248 24 624678fb for more information www.linear.com/ltc6246 package description package description please refer to http:// www .linear.com/designtools/packaging/ for the most recent package drawings. 1.50 C 1.75 (note 4) 2.80 bsc 0.22 C 0.36 8 plcs (note 3) datum a 0.09 C 0.20 (note 3) ts8 tsot-23 0710 rev a 2.90 bsc (note 4) 0.65 bsc 1.95 bsc 0.80 C 0.90 1.00 max 0.01 C 0.10 0.20 bsc 0.30 C 0.50 ref pin one id note:1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.40 max 0.65 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref ts8 package 8-lead plastic tsot-23 (reference ltc dwg # 05-08-1637 rev a) downloaded from: http:///
ltc6246/ltc6247/ltc6248 25 624678fb for more information www.linear.com/ltc6246 information furnished by linear technology corporation is believed to be accurate and reliable . however, no responsibility is assumed for its use . linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights . revision history rev date description page number a 2/10 changes to graph g15. 9 b 7/15 added 2mm 2mm 0.8mm dfn package. 2, 3, 23 downloaded from: http:///
ltc6246/ltc6247/ltc6248 26 624678fb for more information www.linear.com/ltc6246 ? linear technology corporation 2009 lt 0715 rev b ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltc6246 typical application part number description comments operational amplifiers lt1818/lt1819 single/dual wide bandwidth, high slew rate low noise and distortion op amps 400mhz, 9ma, 6nv/ hz , 2500v/s, 1.5mv C85dbc at 5mhz lt1806/lt1807 single/dual low noise rail-to-rail input and output op amps 325mhz, 13ma, 3.5nv/ hz , 140v/s, 550v, 85ma output drive lt6230/lt6231/lt6232 single/dual/quad low noise rail-to-rail output op amps 215mhz, 3.5ma, 1.1nv/ hz , 70v/s, 350v lt6200/lt6201 single/dual ultralow noise rail-to-rail input/output op amps 165mhz, 20ma, 0.95nv/ hz , 44v/s, 1mv lt6202/lt6203/lt6204 single/dual/quad ultralow noise rail-to-rail op amp 100mhz, 3ma, 1.9nv/ hz , 25v/s, 0.5mv lt1468 16-bit accurate precision high speed op amp 90mhz, 3.9ma, 5nv/ hz , 22v/s, 175v, C96.5db thd at 10v p-p , 100khz lt1803/lt1804/lt1805 single/dual/quad low power high speed rail-to-rail input and output op amps 85mhz, 3ma, 21nv hz , 100v/s, 2mv lt1801/lt1802 dual/quad low power high speed rail-to-rail input and output op amps 80mhz, 2ma, 8.5nv hz , 25v/s, 350v lt6552 single supply rail-to-rail output video difference amplifier 75mhz (C3db), 13.5ma, 55.5nv/ hz , 350v/s, 20mv lt1028 ultralow noise, precision high speed op amps 75mhz, 9.5ma, 0.85nv/ hz , 11v/s, 40v lt6233/lt6234/lt6235 single/dual/quad low noise rail-to-rail output op amps 60mhz, 1.2ma, 1.2nv/ hz , 15v/s, 0.5mv lt6220/lt6221/lt6222 single/dual/quad low power high speed rail-to-rail input and output op amps 60mhz, 1ma , 10nv/ hz , 20v/s, 350v lt6244 dual high speed cmos op amp 50mhz, 7.4ma, 8nv/ hz , 35v/s, 100v, input bias current = 1pa lt1632/lt1633 dual/quad rail-to-rail input and output precision op amps 45mhz, 4.3ma, 12nv/ hz , 45v/s, 1.35mv lt1630/lt1631 dual/quad rail-to-rail input and output op amps 30mhz, 3.5ma, 6nv/ hz , 10v/s, 525v lt1358/lt1359 dual/quad low power high speed op amps 25mhz, 2.5ma, 8nv/ hz , 600v/s, 800v, drives all capacitive loads adcs ltc2366 3msps, 12-bit adc serial i/o 72db snr, 7.8mw no data latency tsot-23 package ltc2365 1msps, 12-bit adc serial i/o 73db snr, 7.8mw no data latency tsot-23 package ltc1417 low power 14-bit 400ksps adc parallel i/o single 5v or 5v supplies, 0v to 4.096v or 2.048v input range ltc1274 low power 12-bit 400ksps adc parallel i/o 10mw single 5v or 5v supplies, 0v to 4.096v or 2.048v input range related parts ltc6246 + C 624678 ta02a v out 0.5v + i pd 1m 3v r1 1m, 1% 3v 3v r21k i pd c3 0.1f c1 0.1pf r5 20k r4 10k r31k ?3db bw = 700khzi cc = 2.2ma output noise = 153v rms measured on a 1mhz bw c26.8nf film or npo pd1 osram sfh213 q1nxp bf862 20nv/ hz /div 200 0 624678 ta02b 100khz 1mhz 10khz 0v 5v/div led driver voltage 624678 ta02c 500ns/div 500mv/div output waveform 700khz, 1m single supply photodiode amplifier output noise spectrum transient response downloaded from: http:///

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